This is a configurable complex DSP core for signal processing application on programmable logic devices. The core can be configured to perform some of the commonly used DSP functions such as digital filters, correlators and FFTs. The cores control signals allow the DSP function to be changed in real time hence allowing re-use of chip resources. The core consists of a conjugation unit, a complex multiplier, a complex pre-adder and two configurable width complex accumulators (X and Y). This DSP engine is written in VHDL, capable of being used on any FPGA/ASIC architecture.