MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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CCSDS (8160,7136) LDPC Encoder
The LDPC Encoder is a fully compatible CCSDS rate 223/255 (8160,7136) LDPC error control encoder.
A regular quasic–cyclic LDPC code with 511x511 square circulants with weight 2 in the parity check matrix is used. There are 2x16 circulants, resulting in a check node degree of 32 and a variable node degree of 4.
A regular quasic–cyclic LDPC code with 511x511 square circulants with weight 2 in the parity check matrix is used. There are 2x16 circulants, resulting in a check node degree of 32 and a variable node degree of 4.
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Block Diagram of the CCSDS (8160,7136) LDPC Encoder
