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PCIe5.0 的XpressCCIX-AXI 控制器IP
PCIe 5.0, 4.0, 3.1/3.0 控制器IP支持根端口，端点，双模式，交换机端口配置，支持CCIX ESM和本地用户界面, 可选内置DMA和可配置AMBA AXI互连
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Block Diagram of the PCIe5.0 的XpressCCIX-AXI 控制器IP
PCIe IP
- PCIe Controller Testbench
- PCIe 5.0 PHY in TSMC (16nm)
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
- 56G Serdes in 7nm bundled with PCie Gen 5 controller IP
- PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- PCIe 6.0 SerDes PHY