The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor. Its small size allows the remote sensor to be placed much closer to critical blocks within complex architectures such as within processor cores as opposed to on the periphery. The central hub also has an asynchronous digital output which triggers if the temperature exceeds the pre-programmed trip temperature. This asynchronous design also ensures that the catastrophic temperature monitor will function even if the system clock has stopped. This In-Chip Sensing and PVT Monitoring IP is available as part of the Synopsys DesignWare® Foundation IP portfolio. It also forms the foundation of the new Synopsys Silicon Lifecycle Management (SLM) platform. SLM enables new levels of insight for both SoC providers as well as their customers to optimize operational activities at each stage of the device and system lifecycles from design to in-field.