Capless low input voltage LDO in GF 22FDX
查看 Capless low input voltage LDO in GF 22FDX 详细介绍:
- 查看 Capless low input voltage LDO in GF 22FDX 完整数据手册
- 联系 Capless low input voltage LDO in GF 22FDX 供应商
Block Diagram of the Capless low input voltage LDO in GF 22FDX
LDO IP
- LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
- LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output
- Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO
- Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
- LDO Linear Voltage Regulator
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL