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Capless LDO regulator in TSMC 22ULL
Capacitor-less low input voltage LDO regulator in TSMC 22ULL with programmable output voltage to supply core logic domain, SRAM array or RF/analog domain. It features normal and low-power (LP) operating modes to adjust the amount of output current depending on the application requirements.
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LDO IP
- LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
- LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output
- Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO
- Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
- LDO Linear Voltage Regulator
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