MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
Bluetooth LE v5.3 / Zigbee 3 RF/PHY for Global Foundry 55nm(经过硅验证的 IP)
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Block Diagram of the Bluetooth LE v5.3 / Zigbee 3 RF/PHY for Global Foundry 55nm(经过硅验证的 IP)
ULP IP
- MIPI D-PHY Universal IP in TSMC 22ULP
- TESIC RISC-V CC EAL5+ Secure Element Soft/Hard Macro
- MIPI C-PHY/D-PHY Combo Universal IP, 4.5Gsps/4.5Gbps in TSMC 22ULP
- Bluetooth Dual Mode v5.4 / IEEE 15.4 PHY/RF IP in TSMC22nm ULP
- MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP in TSMC 40ULP
- Duet Package of Embedded Memories and Logic Libraries for UMC (40nm, 28nm)