The designated IP is a very low power, high precision band gap reference circuit intended for integration into 130nm CMOS technology System on Chips. The low power bandgap limits the current consumption to 15μA and reference voltage variation to less than 3% over a temperature range of -40 to 125 deg C and over a wide range of voltage supply.
- Fully integrated, compact design
- +/- 3% Accuracy.
- 3.3V± 10% power supply
- Low current consumption (15µA).
- No need of external capacitors.
- CMOS 130nm 1P8M,3.3V IO MOS
- Very low current consumption (15 μA).
- Fast time to market
- GDSII & CDL Netlist
- .lef for PnR
- Technical Reference Manual, Design Document