The Digital Blocks DB-DMAC-MC-AXI Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 2, 4, 8, or 16 independent data transfers. The Direct Memory Access Controller IP Core contains a fixed 2 to 16 DMA Controller Engines (i.e. DMA Channels), with user selectable AMBA AXI4 / AXI3 Master Read/Write interconnects. The DB-DMAC-MC-AXI excels at high data throughput on both small and large data sets. Please contact Digital Blocks about our parameter configurable DMA Controller IP (typically 1 to 256 DMA Channels).