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AXI General Purpose IO
The AXI GPIO provides a general purpose input/output interface to the AXI (Advanced eXtensible Interface) interface. This 32-bit soft IP core is designed to interface with the AXI4-Lite interface.
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Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Universal Chiplet Interconnect Express (UCIe) Controller
- Serial Peripheral Interconnect Master & Slave Interface Controller
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Physical Layer Interface Core
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC