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AXI DMA Controller
The AXI Direct Memory Access (AXI DMA) IP provides high-bandwidth direct memory access between memory and AXI4-Stream-type target peripherals. Its optional scatter gather capabilities also offload data movement tasks from the Central Processing Unit (CPU) in processor based systems. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface.
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Interface and Interconnect IP
- FlexNoC Network on Chip SoC Interconnect IP
- Cache Coherent Interconnect
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Configurable PCI Express 4.0 Controller for ASIC/SoC with a configurable AMBA AXI3/AXI4 user interface
- Serial Peripheral Interconnect Master & Slave Interface Controller
- Physical Layer Interface Core