MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3A, N3E)
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AXI Chip2Chip
Included at no additional charge with EDK software.
The LogiCORE™ IP AXI Chip2Chip is a soft Xilinx IP core for use with the Xilinx Embedded Development Kit (EDK). The adaptable block provides bridging between AXI systems for Multi-FPGA System on Chip solutions. The core supports multiple FPGA-to-FPGA interfacing options and provides a low pin count, high performance AXI chip-to-chip bridging solution.
The LogiCORE™ IP AXI Chip2Chip is a soft Xilinx IP core for use with the Xilinx Embedded Development Kit (EDK). The adaptable block provides bridging between AXI systems for Multi-FPGA System on Chip solutions. The core supports multiple FPGA-to-FPGA interfacing options and provides a low pin count, high performance AXI chip-to-chip bridging solution.
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Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Universal Chiplet Interconnect Express (UCIe) Controller
- Serial Peripheral Interconnect Master & Slave Interface Controller
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Physical Layer Interface Core
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC