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AXI 1G/2.5G Ethernet Subsystem
The AXI Ethernet Subsystem provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset. This AXI4-Lite slave interface supports single beat read and write data transfers (no burst transfers). The transmit and receive data interface is via the AXI4-Stream interface. This core has been designed incorporating the applicable features described in IEEE Std. 802.3-2012.
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