Upgraded PUF-based Crypto Coprocessor (Compliant with TLS 1.3 / FIPS 186-5)
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Audio ADDA IP, 24 bits, 96KHz, UMC 0.153um SP process
24-Bit 96KHz Sampled Mono Audio CODEC with Speaker Driver & Microphone bias, UMC 0.153um Logic/Mixed-Mode process.
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ADC/DAC IP
- Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency
- 12-bit 12-Gsps Transceiver (ADC/DAC/PLL)
- 8-bit 48-Gsps Transceiver (ADC/DAC/DLL)
- 40nm 1.1V AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Clock-PLL
- Analog Front End: 4 channels of 12-bit 2 GSPS ADC IQ Pairs, 4 channels of 12-bit 2 GSPS DAC IQ Pairs, PVT & Integrated PLL
- Analog Front End: 1 channel of 12-bit 2 GSPS ADC IQ Pairs, 1 channel of 12-bit 2 GSPS DAC IQ Pairs, PVT & Integrated PLL