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ATSC 8VSB Modulator

The IPrium-ATSC-8VSB-Modulator IP Core implements the USA DTV standard ATSC A/53 Part 2. The IP Core contains Scrambler, RS Encoder, Trellis Encoder, 8VSB Modulator and Digital Upconverter.

特色

Fully synchronous design, using single clock
Fully synthesizable drop-in module for FPGAs
Optimized for high performance and low resources
Low implementation loss
Fully verified and real-time tested on a FPGA based development platform
Considerations for easy ASIC integration
Validated on IPrium Evaluation Boards

可交付内容

VQM/NGC/EDIF netlists for Intel (Altera) Quartus Prime, Xilinx Vivado/ISE, Lattice Diamond or Microsemi (Actel) Libero SoC
IP Core testbench scripts
Design examples for Intel (Altera), Xilinx, Lattice, and Microsemi (Actel) evaluation boards
Free 1 year warranty and support period