The M429T1R1 macro implements a synchronous single-chip ARINC 429 Transmit and Receive Controller Macro capable of linking one CPU to one ARINC 429 bus. The macro controls all ARINC 429 bus specific sequences, protocol and timing. The M429T1R1 macro interface allows the parallel-bus microprocessor to communicate bidirectionally with the ARINC 429 bus. This macro can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.