400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
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ARINC 429 IP
The M429GEN IP implements a synchronous single-chip ARINC 429 Transmit and Receive Controller capable of linking one CPU to one or several ARINC 429 bus. The IP controls all ARINC 429 bus specific sequences, protocol and timing. The M429GEN IP interface allows the parallel-bus microprocessor to communicate bidirectionally with the ARINC 429 bus.
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Block Diagram of the ARINC 429 IP
