MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
ARINC 429 IP Core
IP Core uses AXI interface as internal local bus. AXI interface is 32-bit data bus which has 32-bit addressing, 32-bit read and write channel. IP supports to 32 receive channel number and
16 transmit channel number.
The IP is designed to be compatible with DO-254. ARINC 429 IP is field approved.
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