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ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. The DSP enhanced implementation (RMX-500D) adds DSP capability for applications such as IoT wearable devices where the combination of low power and signal processing are required to enable device performance and extend battery life.
The ARC-V RMX-500 processors are based on the RISC-V instruction set architecture (ISA). The processors feature an efficent 5-stage pipeline that provides excellent throughput for embedded applications.
The ARC-V RMX-500 features up to 64KB of level 1 (L1) instruction & data cache and up to 2MB each of closely coupled instruction and data memories (CCM).
The DSP-enhanced RMX-500D cores include an optimized DSP implementation that features support for fixed-point DSP datatypes and vector operations.
To enable easy DSP software development, the ARC MetaWare Development Toolkit features a rich DSP software library and the included C/C++ Compiler supports commonly used DSP datatypes for easy algorithm programming.
The ARC-V RMX-500 processors are based on the RISC-V instruction set architecture (ISA). The processors feature an efficent 5-stage pipeline that provides excellent throughput for embedded applications.
The ARC-V RMX-500 features up to 64KB of level 1 (L1) instruction & data cache and up to 2MB each of closely coupled instruction and data memories (CCM).
The DSP-enhanced RMX-500D cores include an optimized DSP implementation that features support for fixed-point DSP datatypes and vector operations.
To enable easy DSP software development, the ARC MetaWare Development Toolkit features a rich DSP software library and the included C/C++ Compiler supports commonly used DSP datatypes for easy algorithm programming.
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