The Multi-Channel DMA Controller supports 1 – 32 independent data block / packet / stream transfers. The Direct Memory Access (DMA) Controller IP Core contains 1 - 32 DMA Controller Engines (i.e. DMA Channels), supporting a 1 – 32 interfaces, including AMBA AXI / AHB / APB interconnects. A customized number of DMA Controller Engines and interfaces are available.
The individual internal DMA Controller Engine services each interface at its maximum throughput, whether it’s an AXI4 with high data burst and width capability, or Peripheral with slower speed, narrower data width requirements.
The DMA Controller IP Core can serve as a general-purpose Programmable DMA Controller supporting many system memories and peripherals, or be sized to the user required number of DMA Engines, AMBA interconnect interfaces, and user application interfaces.