AES encryptor / AES decryptor - Symmetric Security Range
The family of IPX-AES IP-Cores is an encryptor / decryptor core range that efficiently implements in FPGA the Advanced Encryption Standard as specified in the Federal Information Processing publication FIPS-197 of the National Institute of Standards and Technology.
The IPX-AES module can be customized to ensure its optimization for a wide range of specific application fields with a design architecture that can be adapted to support from low up to very high bit-rates. Its flexibility allows combining several functions and operating modes on very small footprints.
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Block Diagram of the AES encryptor / AES decryptor - Symmetric Security Range

AES IP
- UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8
- FortiCrypt AES SX Series IP Core
- Tunable AES (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection
- AES-ECB-CBC-CFB-OFB-CTR-GCM-XTS-CCM Crypto Accelerator
- DPA Resistant AES Core
- AES + SHA DMA Crypto Accelerator