The Cadence Dual 7-bit, 3GSps ADC IP is a dual 7-bit ADC with differential inputs. Each ADC supports sustained conversion rates of 3GSps.
This Dual 7-bit, 3GSps ADC IP has clean, well-defined interfaces for easy incorporation into any analog front-end (AFE) or system-on-chip (SoC) design. A Cadence-standard Analog Test Bus is included to facilitate preproduction testing. Implemented on the TSMC 28HPC process, the Cadence ADC IP provides a cost-effective, power-efficient solution for demanding applications.