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ADC 10-bit pipeline 110Mhz 3.3V
This Analog -to-Digital converter IP has a monolithic differential pipelined architecture with output error correction logic providing 10 bits conversion accuracy from 10 up to 110 Mhz sampling frequency.
It is designed for industry standard 0.18um 1P6M CMOS technology supplied at 3.3V.
This ADC can interface with both 1.8V or 3.3V core logic, by connecting dvdd to 1.8 or 3.3V power line, giving more flexibility for design reuse.
It is designed for industry standard 0.18um 1P6M CMOS technology supplied at 3.3V.
This ADC can interface with both 1.8V or 3.3V core logic, by connecting dvdd to 1.8 or 3.3V power line, giving more flexibility for design reuse.
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