Adaptive Detail Enhancer
The VPC-5 is available with complete Verilog source code, Verilog test bench and bit-accurate C model as part of the license. Integration and programming guidelines are also included backed up by expert technical support.
A VPC-5 reference design is available for standard development kits from Xilinx and Altera for demonstration and evaluation purposes. The design includes a built-in user interface with embedded OSD to simplify access to key features of the IP. In addition to simplifying the evaluation of the VPC-5 IP core, the design also serves as a template for customer application development.
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