You are here:
A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell
Key attributes of our TSMC 65nm IO library include dual independent IO supply rails (1.0V-3.3V & 3.3V) and power-on-control (POC) to place IOs in a low-power HiZ state during power-down. The GPIO cell can be configured as input, output or open-drain with a Schmitt trigger input and optional internal 55K ohm pull-up or pull-down resistor. ESD protection for two independent IO supplies and core power is constructed in an aggressive footprint. A specialty output cell with matched throughput timings for pulse-width modulation (PWM) applications, along with 5V OTP programming, I2C & SVID open-drain and 3.3V & 5V analog cells complement the GPIO offering. The library is enriched with filler, corner and domain-break cells in digital and analog domains to allow for flexible pad ring construction.
Built into our IO libraries, and also offered as a separate service, is our strong ESD expertise. Certus was founded by ESD engineers and our results speak for themselves. Not only do we consistently exceed the standard ESD targets of 2KV HBM and 500V CDM, but we also provide on-chip solutions for standards such as IEC-61000-4-2, system-level ESD and Cable Discharge Events (CDE).
Certus supports IO libraries across multiple TSMC nodes including 180nm, 130nm, 65nm, 40nm, 28nm, 22nm, and 16/12nm. Certus is particularly suited at providing custom variants in a cost-efficient framework. Please contact us for supplementary physical or electrical features that can suit your needs.
Built into our IO libraries, and also offered as a separate service, is our strong ESD expertise. Certus was founded by ESD engineers and our results speak for themselves. Not only do we consistently exceed the standard ESD targets of 2KV HBM and 500V CDM, but we also provide on-chip solutions for standards such as IEC-61000-4-2, system-level ESD and Cable Discharge Events (CDE).
Certus supports IO libraries across multiple TSMC nodes including 180nm, 130nm, 65nm, 40nm, 28nm, 22nm, and 16/12nm. Certus is particularly suited at providing custom variants in a cost-efficient framework. Please contact us for supplementary physical or electrical features that can suit your needs.
特色
- GPIO:
- 1.0V-3.3V | 3.3V IO operation
- Dual independent IO rails
- Output enable / disable (HiZ when disabled)
- Power-down control (low-power HiZ upon VDD disable)
- Schmitt trigger receiver
- 55KΩ selectable pull-up or pull-down resistor
- ESD: 2KV HBM, 500V CDM
- Silicon proven
- I2C / SVID Open-Drain I/O:
- Up to 3.3V external supply support
- Hysteresis input
- Power sequence independence
- External resistor support of 1K-50K Ohm
- Fail-safe
- 2KV HBM, 500V CDM
- Also DDC, CEC and HPD compliant
- ANALOG
- 3.3V & 5V tolerant options
- 2KV HBM, 500V CDM
- OTP Programming Cell
- 6.6V tolerant supply gating cell
- 2KV HBM, 500V CDM
- Physical Attributes
- 7-metal stack - 4X2Z
- 55um x 100um digital cell size
- 55um x 76um analog cell size
- 55um single inline wirebond pitch
优势
- Area-efficient
- Power management features
- Dual independent IO rails (1.0-3.3V | 3.3V)
- Customizable
- Pull-up / pull-down resistor options
- Feature-rich
- Open-drain & analog cells
- 55um single inline wirebond pitch
- Silicon proven
可交付内容
- GDS
- CDL netlist
- Verilog stub
- Verilog behavioral model
- LEF
- Liberty Timing Files
- IBIS (option)
- Electrical datasheet
- User guide and application notes
- Consulting and Support
应用
- LVCMOS, GPIO, I2C, SVID, DDC, CEC, HPD
Block Diagram of the A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell
查看 A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell 详细介绍：
- 查看 A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell 完整数据手册
- 联系 A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell 供应商