Advanced Encryption Standard (AES-128) core with AMBA AHB interface
You are here:
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLP, Sesame 9T, a unique architecture based on 9 track cells, optimized for High Density and Low Dynamic Power allowing users to create faster SoC than with 7-Track libraries.
特色
- Compromise for density and speed9-Track high cells
- Only Metal 1 used for cell design
- Compatible with 1P3M SoC implementationwith island construction kit
查看 9 track standard cell library at TSMC 55 nm 详细介绍：
- 查看 9 track standard cell library at TSMC 55 nm 完整数据手册
- 联系 9 track standard cell library at TSMC 55 nm 供应商
Standard cell IP
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 7 track Ultra High Density standard cell library at TSMC 28 nm
- 7 track Ultra High Density standard cell library at TSMC 28 nm HPC+