MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
8 track thick oxide standard cell library at TSMC 90 - low leakage and direct battery connection (operating voltages from 1.08 V to 3.63 V)
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standard cell IP
- Standard Cell Library in TSMC (12nm~180nm)
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- 7 track Extra Low Consumption standard cell library with Dual voltage capability (1.8 V / 1.1 V)
- 9 track standard cell library at TSMC 55 nm
- 9 track standard cell library at TSMC 55 nm
- 6 track Ultra High Density standard cell library at TSMC 55 nm