Dual thread, superscalar, embedded 32-bit RISC-V core with 9-stage pipeline
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8-bit ≤51GSa/s Ultra-high-speed ADC in 16nm TSMC CMOS
"ADC IP Macro.
Originally developed for high speed optical communication systems but used in many other applications
Low power consumption
Small area
Simple integration process
Generic, flexible, silicon-proven
Larger range of IP Macro family is available
Field proven: many different variants deployed in various devices in the market
Development Kits for initial evaluation available (SNEUADCDAC16H)
"
Originally developed for high speed optical communication systems but used in many other applications
Low power consumption
Small area
Simple integration process
Generic, flexible, silicon-proven
Larger range of IP Macro family is available
Field proven: many different variants deployed in various devices in the market
Development Kits for initial evaluation available (SNEUADCDAC16H)
"
特色
- ADC with ultra-high sampling rate, low power, high BW, high ENOB
- Process technology: 16nm
- Resolution: 8 bit
- Sampling rate: 30– 51 GSa/s (H variant)
- Programmable analogue input range: 0.5 – 1.7VPPDIFF
- Output clock @Fs/128 to digital core per channel
- Bandwidth (-3dB): 0.4*Fs
- Fully programmable and high performance fractional DPLL
- Available in single channel, IQ pair, 2x IQ pair and 4x IQ pair
- Fully specified for -5C to 100C operation
- APB control interface
优势
- "Socionext has over 40 years’ experience and is a leader in state-of-the art system-on-chip technology and provides high performance SoC designs, serial transceiver technologies and advanced packaging solutions.
- Socionext combines specialist high-speed analogue, mixed-signal and digital designs having SoCs with large capacities, small sizes, and low power consumption through realization of 40nm, 28nm, 16nm and further advanced technologies.
- Therefore, in addition to IP offering , also total SoC (ASIC) solutions that include proven high-speed and large-pin-count package design, and verification can be supported/provided.
- IP and Base Technology for the most Advanced Digital Coherent SoCs including:
- Low-power, high-speed ADC
- Low-power, high-speed DAC
- Low-power High-speed VSR/MR/LR SerDes (1–56 Gb/s)
- Jitter Cleaning PLLs
- Temperature Sensor
- "
可交付内容
- Documentation: Datasheet, User Guides, Test Report
- Hard Macro & integration support
- Abstract LEF and timing LIB files with constraints
- Behavioral Verilog model
- Example test bench
- Layout/Package guide
应用
- "Wireline/Optical Networking
- Wireless/Satellite Communication
- Antenna/Phased-Array Communication Sytems/MIMO
- Test & Measurement Equipment
- Industrial and Customer applications"
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