Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
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64-bit High performance Dual Core Microprocessor
VEGA AS2161 features a dual core out-of-order processing engine with a 16-stage pipeline for high performance compute requirements. The processor also supports single and double precision floating point instructions, and MMU for Linux based applications. This high-performance application core is equipped with Instruction Cache, Data Cache and an advanced branch predictor for efficient branch execution. The processor has separate Level 1 Instruction cache and Data cache along with Level 2 Cache facilitating high performance applications such as Media server, Single Board Computer, Storage, and Networking etc.
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Block Diagram of the 64-bit High performance Dual Core Microprocessor
Video Demo of the 64-bit High performance Dual Core Microprocessor
VEGA Processor Introduction
RISC-V IP
- RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
- ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
- ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications
- ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
- 32-bit Embedded RISC-V Functional Safety Processor