Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
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64/256 state block Viterbi decoder
The VA08S is a low complexity 64 or 256 state error control decoder using the maximum likelihood Viterbi algorithm. The decoder is designed to efficiently decode short block lengths with maximum flexibility, allowing it to decode various communications standards, as well as custom coding solutions.
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