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6 track High Density standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLP, SESAME HD DV provides the best trade-off between area and power achieved from an innovative cell design enabling 6-track cells and 1P3M SoC implementation.
特色
- High Density optimization
- 6-Track high cells for optimal area reduction
- Only Metal 1 used for cell design
- Compatible with 1P3M SoC implementation
- with island construction kit
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Standard cell IP
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
- 7 track Ultra High Density standard cell library at TSMC 28 nm
- 7 track Ultra High Density standard cell library at TSMC 28 nm HPC+