MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3A, N3E)
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56G Serdes in 7nm bundled with PCie Gen 5 controller IP
New IP for value conscious designers.
Integrates Serdes for high speed Ethernet and PCIe (to Gen5).
Also bundled with PCie Gen 5 controller reduces costs and risks
Integrates Serdes for high speed Ethernet and PCIe (to Gen5).
Also bundled with PCie Gen 5 controller reduces costs and risks
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Multi-Protocol IP
- Multi-Protocol Crypto Packet Engine, Low Power, Bus Attached
- Multi-Protocol Crypto Engine
- Multi-Protocol Crypto Engine with Classification
- Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)