The Xelic 4x10G/40G GFEC (XCO23GFEC) core performs FEC encoding and decoding of 4xOTU2/1xOTU3 frames using 16 byte-interleaved RS(255,239) codewords as specified in ITU-T G.709 Interfaces for the optical transport network (OTN). The XCO23GFEC contains independent encoder and decoder functions fully compliant with the G.709 specification and has been through extensive interoperability testing. Corrected errors and uncorrectable codeword detection is provided along with a configurable High BER alarm. Line and system side data is transferred at an OTU3 rate using a 128-bit data bus operating at a nominal frequency of 355MHz.
- Suitable for FPGA and/or ASIC implementations.
- Integration support and maintenance available.
- XCO23GFEC core available under flexible single use licensing terms with netlist or source code deliverables.
- Complies with ITU-T G.709 specification.
- Contains 7 parity overhead.
- Encoder includes single bit error insertion for diagnostic purposes.
- Provides outputs for scrambled line values of corrected ones and corrected zeroes.
- Provides corrected symbols, corrected codewords and uncorrected codewords outputs.
- Provides statistics per lane in case of OTL3.4 and per stream in case of 4x10G mode.
- Architecture facilitates RAM sharing with other FEC cores.
- Provides a configurable High BER alarm.
- Overall latency of less than 1us.