4K, 4:2:0/4:2:2:/4:4:4, 8/10/12 bit HEVC Decoder
ParaQum HEVC decoder is world's first 4K real time HEVC decoder implemented on an FPGA with sub 150MHz clock frequencies.
High Efficiency Video coding (H.265) is the emerging video compression standard that promises 50% bit rate reduction compared to its predecessor H264. This IP core takes HEVC compliant elementary streams and outputs raw video. The decoder interfaces are AXI compliant for easy integration.
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Block Diagram of the 4K, 4:2:0/4:2:2:/4:4:4, 8/10/12 bit HEVC Decoder
Video Demo of the 4K, 4:2:0/4:2:2:/4:4:4, 8/10/12 bit HEVC Decoder
This video demonstrates real time decoding of 4K 30fps using Paragon HEVC decoder on Xilinx Zynq ZC 706 FPGA. Paragon HEVC decoder is capable of decoding 4K videos up to 45 fps and supports bit depths up to 12.
4:2:0 , 4:2:2 and 4:4:4 profiles are supported in Paragon HEVC decoder
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