2.5D Multi-Core Raster & Vector Graphics Processor for low-power SoCs with Microcontroller
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40nm LP DDR3/4 LPDDR23 COMBO PHY DATA Block for Flip Chip usage
40nm LP DDR3/4 LPDDR23 COMBO PHY DATA Block for Flip Chip usage
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Interface Solution IP
- PCIe 6.1 Controller
- Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
- PCIe 5.0 Controller with AMBA AXI interface
- PCIe 4.0 Controller with AMBA AXI interface
- Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard
- HW/SW interface foundation for design innovation