Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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40nm 1.8V Programmable 1.1V LDO Regulator with 50mA max. output
The TRV702TSM40LP IP is a 1.8V low-power programmable 1.1V LDO implemented in TSMC Low-Power 40nm CMOS process technology. Its low noise and high-precision makes it especially suitable for use in wireless communication and broadcast integrated circuit subsystems (LTE, WiFi, WiMAX, DAB, DAB+, FM, HDFM, DRM, etc).
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Block Diagram of the 40nm 1.8V Programmable 1.1V LDO Regulator with 50mA max. output
Low Drop-out Regulator 40nm LTE WiFi Low Power Low Area IP
- 12-bit 40nm 1.1V 80MHz Asynchronous-SAR ADC
- 12-bit 40nm 1.1V 80MHz Asynchronous-SAR IQ ADC
- 12-bit 40nm 1.1V 320MHz Digitally-Assisted Current DAC
- 12-bit 40nm 1.1V 320MHz Digitally-Assisted IQ Current DAC
- 40nm 1.8V Programmable Band-Gap Reference with 0.55V output
- 40nm 1.1V 16MHz-2GHz Fractional-N Clock-PLL