Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
You are here:
40G/50G Ethernet Subsystem
The Xilinx® LogiCORE™ IP 40G/50G Ethernet solution provides a 40 Gigabit or 50 Gigabit per second (Gbps) Ethernet Media Access Controller integrated with a PCS/PMA in BASE-R/KR modes or a standalone PCS/PMA in BASE-R/KR modes. The core is designed to work with the latest UltraScale™ and UltraScale+™ FPGAs.
The 50G Ethernet IP is designed to the new 25G/50G Ethernet Consortium standard and supports the demand of cloud data centers to enable lower cost and increased performance solutions between the server and the top of rack switch and to increase the front panel density.
The 50G Ethernet IP is designed to the new 25G/50G Ethernet Consortium standard and supports the demand of cloud data centers to enable lower cost and increased performance solutions between the server and the top of rack switch and to increase the front panel density.
查看 40G/50G Ethernet Subsystem 详细介绍：
- 查看 40G/50G Ethernet Subsystem 完整数据手册
- 联系 40G/50G Ethernet Subsystem 供应商
Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Universal Chiplet Interconnect Express (UCIe) Controller
- Serial Peripheral Interconnect Master & Slave Interface Controller
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Physical Layer Interface Core
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC