The world’s most reliable and mature full hardware
PGM, UDP/IP and MAC IP Cores.
Bring the best-in-class network connectivity to your hardware code and algorithms with Enyx rock-solid and acclaimed Ethernet IP Cores. Minimize time-to-market with our full RTL implementation and support. Stay always at the forefront of technology with our frequent updates with the latest improvements and optimizations.
- 40G/25G/10G/1G Ethernet connectivity. Maximum bandwidth delivered with low latency.
- Full RTL Layers 2, 3 and 4, which include Enyx proprietary full-hardware PGM, UDP/IP, ARP, ICMP, IGMP and MAC implementations.
- Easy to use standardized Avalon and AXI-4 interfaces.
- Support of multiple instances per FPGA.
- Each connection can be configured dynamically in server or client mode.
- Support for Unicast and Multicast transmit/receive (UDP), and reliable multicast (PGM).
- IP Core
- Libraries for functional simulation
- Synthesizable VHDL and Verilog RTL (encrypted) for synthesis/implementation
- Client-Server Reference Designs
- Simulation environment and scripts
- Quartus II and Vivado Synthesis/implementation project for supported partner’s
- Complete Documentation
- User’s manual
- Getting started guide
- Technical Support and Maintenance Updates
- 1 year of technical support
- 1 year of IP updates
Block Diagram of the 40G/25G/10G/1G PGM + UDP/IP + MAC IP Core for FPGAs