MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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4 Gbps DDR CML receiver and transmitter
055TSMC_CML_01 is a library including:
- CML receiver (CML_RX);
- CML transmitter (CML_TX).
The CML_RX block is intended to receive a CML signal and convert it to a CMOS signal. The CML_TX block is intended to convert signal from CMOS to CML standard and transmit CML signal to external circuits. CML_TX has pre-emphasis circuit.
IP technology: TSMC 55nm CMOS EF technology.
IP status: pre-silicon verification.
Total area:
- CML_RX – 121×121 μm2;
- CML_TX – 110×171 μm2.
- CML receiver (CML_RX);
- CML transmitter (CML_TX).
The CML_RX block is intended to receive a CML signal and convert it to a CMOS signal. The CML_TX block is intended to convert signal from CMOS to CML standard and transmit CML signal to external circuits. CML_TX has pre-emphasis circuit.
IP technology: TSMC 55nm CMOS EF technology.
IP status: pre-silicon verification.
Total area:
- CML_RX – 121×121 μm2;
- CML_TX – 110×171 μm2.
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