MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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32-bit High Performance Single/Multicore RISC Processor
The CC100-C processor is a synthesisable Verilog model of a high performance 32-bit RISC processor. The model is highly configurable, and particularly suitable for system-on-a-chip (SoC) designs. The core is interfaced using the AMBA AHB, AHB-Lite and APB buses. The processor can be efficiently implemented on FPGA and ASIC technologies and uses standard synchronous memory cells for caches and register file.
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Block Diagram of the 32-bit High Performance Single/Multicore RISC Processor
processor IP
- RT-630 Hardware Root of Trust Security Processor for Cloud/AI/ML SoC FIPS-140
- RT-660 DPA & Fault Injection Resistant Hardware Root of Trust Security Processor for Govt/Aero/Defense FIPS-140
- RT-660-FPGA DPA-Resistant Hardware Root-of-Trust Security Processor for Govt/Aero/Defense FIPS-140
- RT-630-FPGA Hardware Root of Trust Security Processor for Cloud/AI/ML SoC FIPS-140
- Secure-IC Securyzr(TM) Cyber Escort Unit IP provides real time detection of sero day attacks on processor
- 64-bit RISC-V Application Processor Core