3.3V Power Support I/O Pad Set
These 7nm libraries are available in inline and staggered flip chip implementations.
The included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous
VDD/VSS for robust ESD protection.
ESD Protection:
▪ JEDEC compliant
o 2KV ESD Human Body Model (HBM)
o 500 V ESD Charge Device Model (CDM)
Latch-up Immunity:
▪ JEDEC compliant
o Tested to I-Test criteria of ± 100mA @ 125°C
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