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3.3V General Purpose I/O Inline Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibility to design to a wide range of performance targets.
These 22nm libraries are available in inline and staggered CUP wire bond implementations with a flip chip option.
To design a functional I/O power domain with these cells, an additional library is required – 3.3V Support: Power. That library contains an input-only buffer, isolated analog I/O, and a full complement of power cells along with corner and spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
These 22nm libraries are available in inline and staggered CUP wire bond implementations with a flip chip option.
To design a functional I/O power domain with these cells, an additional library is required – 3.3V Support: Power. That library contains an input-only buffer, isolated analog I/O, and a full complement of power cells along with corner and spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
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ESD IP
- on-chip ESD protection
- IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline TSMC and GlobalFoundries technology
- 5V ESD Clamp in GlobalFoundries 180nm LPe
- 6.5V ESD Clamp in 180nm Technology
- TSMC RF ESD specifiically targeting low capacitance ESD