Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
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2MHz Ultra Low Power Oscillator - Ultra low power (720nW) Silterra 0.18 μm
This macro-cell is a general purpose, ultra low power internal oscillator core designed for SilTerra 0.18µm CL180G CMOS technology. The circuit has internal level shifting. A 4-bit digital bus allows frequency calibration against process variations. It requires an external 15.5nA current bias (sink), which can be implemented with chipus CM1014ff IP. The core is easily retargeted to any other CMOS technology due to its MOSFET-only oscillator architecture.
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