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25G Ultra Low latency, 64-bit Ethernet MAC + PCS Solution (64-bit and 128-bit UI)
The 25Gbps 64-bit Ethernet IP solution offers a fully integrated IEEE P802.3by compliant package for NIC (Network Interface Card) and Ethernet switching applications. This ultra-low latency solution is specifically targeted for demanding financial, high frequency trading and HPC applications.
* Round Trip Latency of 59.6ns + Device Specific Transceiver Latency
As shown in the figure below, the 25Gbps Ethernet IP includes:
* Ultra-Low latency MAC; Tx = 17.4ns , Rx = 17.4ns; (64-bit user interface mode)
* Ultra-Low latency PCS; Tx = 12.4ns , Rx = 12.4ns; (64-bit user interface mode)
* Technology dependent transceiver wrapper for Altera and/or Xilinx FPGAs
* Statistics counter block (for RMON and MIB)
* MDIO and I2C cores for external module and optical module status/control
* Round Trip Latency of 59.6ns + Device Specific Transceiver Latency
As shown in the figure below, the 25Gbps Ethernet IP includes:
* Ultra-Low latency MAC; Tx = 17.4ns , Rx = 17.4ns; (64-bit user interface mode)
* Ultra-Low latency PCS; Tx = 12.4ns , Rx = 12.4ns; (64-bit user interface mode)
* Technology dependent transceiver wrapper for Altera and/or Xilinx FPGAs
* Statistics counter block (for RMON and MIB)
* MDIO and I2C cores for external module and optical module status/control
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