256-bit vector word length ARC VPX3 DSP

The DesignWare ARC VPX5 DSP processor IP is a member of the VPX VLIW/ SIMD DSP family for high-end computation applications. The VPX5 processor is designed for high-performance automotive ADAS applications such as RADAR and LiDAR, server baseband communications, as well as for multiple sensor fusion computation. The VPX5 processor integrates a high-performance 32-bit scalar core, a 512-bit vector processing unit. Eight, 16, and 32-bit SIMD computation engines compute from the 512-bit vector word. The VPX5 DSP has multiple advanced floating-point computation engines as part of the native architecture. There are two vector floating point engines, supporting half- and single-precision computation. There is also a linear algebra, math vector floating point engine, making the processor suitable for mathematically intensive applications such as automotive powertrain, engine management, and sensor fusion. The VPX5 DSP processors are highly scalable and configurable, enabling users to tailor them to meet high computation performance, while maintaining small size and low power consumption.

To speed application software development, the VPX processor family is supported by Synopsys’ ARC MetaWare Development Toolkit, which provides a comprehensive software programming environment, with an optimizing C/ C++ vector compiler, debugger, instruction set simulator, as well as DSP and math libraries.

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