MIPI CSI2 rev 2.0 transmitter/controller for FPGA, with 8 lanes and 2.5Gbps per lane
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24-bit Cap-less ADC 106 dB SNR
The mADC-uLP-ANC.03 is a mixed (analog and digital) Virtual Component containing one mono ADCs, and additional functions offering an ideal mixed signal front-end for low power, low-latency, fast wake-up and high quality audio applications.
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