MIPI M-PHY G4 Type 1 2Tx2RX in TSMC (16nm, 12nm, N7, N6, N5, N4, N3A, N3E)
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2.5V General Purpose Staggered IO Pad Set
A full range of power pads is provided to enable the system designer different options for separate core power (VDD and VSS) and separate I/O padring power and ground (DVDD and DVSS). The ability to isolate separate power domains is also provided. In addition, the I/O library has a full complement of cells that provide the user with the ability to isolate analog I/O’s and power within the same padring as the digital I/O’s.
Includes:
Programmable GPIO
Programmable fault-tolerant GPIO
Input buffer
Power supplies
Isolated analog power supplies
Oscillators
Full complement of support pads
Includes:
Programmable GPIO
Programmable fault-tolerant GPIO
Input buffer
Power supplies
Isolated analog power supplies
Oscillators
Full complement of support pads
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IO IP
- TSMC 12 FFC Combo Power On Reset_POR_COMBO, IO voltage=1.8V / Core voltage=0.8V
- TSMC 12 FFC 1.2V_Power On Reset_POR12, IO voltage=1.2V
- TSMC 12 FFC 1.8V_Power On Reset_POR18, IO voltage=1.8V
- ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm
- ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 12nm
- ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 28nm