MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
You are here:
17nA Current Bias with Enable - Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V) TowerJazz 0.18 μm
This macro-cell is a low power general purpose current bias generator core designed for TowerJazz 0.18µm TS18SL CMOS technology.
The circuit generates 2 × NMOS 17nA current branches. The current bias is temperature compensated. Output currents come from NMOS drain terminals, thus being sink-type sources.
The circuit generates 2 × NMOS 17nA current branches. The current bias is temperature compensated. Output currents come from NMOS drain terminals, thus being sink-type sources.
查看 17nA Current Bias with Enable - Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V) TowerJazz 0.18 μm 详细介绍：
- 查看 17nA Current Bias with Enable - Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V) TowerJazz 0.18 μm 完整数据手册
- 联系 17nA Current Bias with Enable - Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V) TowerJazz 0.18 μm 供应商
Block Diagram of the 17nA Current Bias with Enable - Low Voltage (1.0V), Ultra Low Power (90nW @ 1.8V) TowerJazz 0.18 μm
