16 to 64 MHz Phase-Locked Loop - Globalfoundries 130nm BCD

130GF_PLL_01 is a ring VCO based phase-locked loop frequency with 16-64 MHz CMOS compatible output clock and fine frequency resolution thanks to the embedded delta-sigma modulator (DSM). The IP consists of a ring voltage controlled oscillator (VCO) with multiple sub-bands and sub-band autoselection system (SAS), a programmable N feedback divider (÷N) controlled by DSM, a digital phase-frequency detector (PFD) with a lock detector (LD), a charge pump (CP) with internal loop filter, a power management unit (PMU), and a programmable C clock divider (÷C).

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