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16-bit General-purpose Fixed-point DSP Core, ADSP-218X Fully Compatible plus Enhancements
The WSP1600 DSP core is a high-speed scalar (one instruction per clock cycle) 16-bit fixed-point Digital Signal Processor optimized for communications, consumer electronics, multi-media, and other high-speed signal processing applications.
The WSP1600 DSP core combines the popular ADSP-218X architecture (3 Computational Units – ALU, MULT/MAC, Shifter, a Program Sequencer, 2 Data Address Generators, 2 DMA Ports, 2 Serial Ports, a Programmable Timer, Flag I/O, General Purpose I/Os, extensive Interrupt capability, IO space registers and on-core Program Memory (PM) and Data Memories (DM)) and WinStream's own Special Feature Enhanced Mode, which includes hooks for adding new instructions and additional banks of the Register File. The WSP1600 DSP core also features an extra set of I, M, L registers for the Data Address Generators as well as powerful MIN & MAX instructions. Similar to the PM, the DM in the WSP1600 core is implemented with Synchronous Dual-Access capability to allow both instruction and DMA triggered access to take place in the same cycle.
The control needed for the enhance features and functions is achieved by standard ADSP-218X instructions and thus requiring no changes to the standard ADSP-218X compiler, assembler, or development environment.
The WSP1600 DSP core combines the popular ADSP-218X architecture (3 Computational Units – ALU, MULT/MAC, Shifter, a Program Sequencer, 2 Data Address Generators, 2 DMA Ports, 2 Serial Ports, a Programmable Timer, Flag I/O, General Purpose I/Os, extensive Interrupt capability, IO space registers and on-core Program Memory (PM) and Data Memories (DM)) and WinStream's own Special Feature Enhanced Mode, which includes hooks for adding new instructions and additional banks of the Register File. The WSP1600 DSP core also features an extra set of I, M, L registers for the Data Address Generators as well as powerful MIN & MAX instructions. Similar to the PM, the DM in the WSP1600 core is implemented with Synchronous Dual-Access capability to allow both instruction and DMA triggered access to take place in the same cycle.
The control needed for the enhance features and functions is achieved by standard ADSP-218X instructions and thus requiring no changes to the standard ADSP-218X compiler, assembler, or development environment.
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